1. Field of the Invention
The present invention is directed to a circuit containing integrated bipolar and complementary MOS transistors on a common substrate wherein suitably doped wells are provided in the substrate for accepting p-channel or n-channel transistors, the wells forming the collector of the bipolar transistor. The invention is also directed to a method for the manufacture of such integrated transistors.
2. Description of the Prior Art
When bipolar transistors and complementary MOS transistors are manufactured simultaneously on a chip, an n-well CMOS process is usually used, the emitter regions and base terminals of the bipolar transistors being implanted simultaneously with the source and drain regions of the MOS transistors, and subsequentially contacted with metal. Such a process is described, for example, in European Patent Application No. 86106486.3. The disclosure of that application is incorporated herein by reference. In that process, npn bipolar transistors are located in n-doped wells, the n-wells forming the collectors of the transistors and cover buried n.sup.+ -doped zones which are connected in the bipolar transistor region by deeply extending collector terminals. The buried part and the collector terminal are generated before the well in this particular process. The well implantation is self-adjusting relative to the implantation of the deep collector terminal which is annularly located with respect to the well. The resulting structure evidences a reduction of collector series resistance as well as an increase in latch-up hardness.
In bipolar technology comprising diffused collectors and in CMOS or BICMOS circuits, however, the packing density is limited by the spacing of neighboring collector or CMOS wells. The minimum spacing between neighboring wells is defined by the lateral out diffusion of wells, of potentially existing buried layers, and collector terminal implantations, as well as the extent to which the depletion zone of the well-substrate junctions extend into the substrate.
It is also possible to reduce the problem by elevating the substrate doping between the wells or on buried layers. Although this reduces the extent of the depletion zones in the substrate and can partly compensate the lateral out-diffusion, it necessarily leads to an increase in the collector-substrate capacitance.